Cable line fault recognition and localization method based on transient traveling wave mode maximum method
Cable line fault recognition and localization method based on transient traveling wave mode maximum method
 CN 105,548,820 A
 Filed: 03/10/2016
 Published: 05/04/2016
 Est. Priority Date: 03/10/2016
 Status: Active Application
First Claim
1. , based on cable line fault identification and the localization method of transient state travelling wave modulus maximum, it is characterized in that the method comprises the following steps:
 Step one, signal detect and synchronized upload in real time;
detected in real time by the A phase current of mains side A phase Hall current sensor (1) to detected cable (11) place line electricity source, and by realtime detected mains side A phase current signal i _{a}synchronized upload to the first data collecting card (7), meanwhile, by realtime detected mains side A phase current signal i _{a}carry out I/V by I/V changeover circuit module (10) and be converted to mains side A phase voltage signal U _{a}rear synchronized upload to the second data collecting card (8);
Detected in real time by the B phase current of mains side B phase Hall current sensor (2) to detected cable (11) place line electricity source, and by realtime detected mains side B phase current signal i _{b}synchronized upload to the first data collecting card (7), meanwhile, by realtime detected mains side B phase current signal i _{b}carry out I/V by I/V changeover circuit module (10) and be converted to mains side B phase voltage signal U _{b}rear synchronized upload to the second data collecting card (8);
Detected in real time by the C phase current of mains side C phase Hall current sensor (3) to detected cable (11) place line electricity source, and by realtime detected mains side C phase current signal i _{c}synchronized upload to the first data collecting card (7), meanwhile, by realtime detected mains side C phase current signal i _{c}carry out I/V by I/V changeover circuit module (10) and be converted to mains side C phase voltage signal U _{c}rear synchronized upload to the second data collecting card (8);
Detected in real time by the A phase current of loadside A phase Hall current sensor (4) to line load side, detected cable (11) place, and by realtime detected loadside A phase current signal i _{a}'"'"' carry out I/V by I/V changeover circuit module (10) to be converted to loadside A phase voltage signal U _{a}'"'"' rear synchronized upload to the second data collecting card (8);
Detected in real time by the B phase current of loadside B phase Hall current sensor (5) to line load side, detected cable (11) place, and by realtime detected loadside B phase current signal i _{b}'"'"' carry out I/V by I/V changeover circuit module (10) to be converted to loadside B phase voltage signal U _{b}'"'"' rear synchronized upload to the second data collecting card (8);
Detected in real time by the C phase current of loadside C phase Hall current sensor (6) to line load side, detected cable (11) place, and by realtime detected loadside C phase current signal i _{c}'"'"' carry out I/V by I/V changeover circuit module (10) to be converted to loadside C phase voltage signal U _{c}'"'"' rear synchronized upload to the second data collecting card (8);
Step 2, signals collecting and storage;
the first data collecting card (7) is to mains side A phase current signal i _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}carry out gathering and corresponding carry out A/D conversion after, synchronous driving is to main control computer (9);
Second data collecting card (8) is to mains side A phase voltage signal U _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}, and loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' carry out gathering and corresponding carry out A/D conversion after, synchronous driving is to main control computer (9);
Main control computer (9) is to mains side A phase current signal i _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}, mains side A phase voltage signal U _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}, and loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' sampled point quantity, all sampled points and the sampling instant corresponding to each sampled point store;
Step 3, cable fault identification;
when detected cable (11) breaks down, the mains side A phase current signal i that the first data collecting card (7) sends _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}for faultsignal, now pass through main control computer (9) to mains side A phase current signal i _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}carry out analyzing and processing, and corresponding to show that the fault type of detected cable (11) belongs in A phase ground short circuit fault, B phase ground short circuit fault, C phase ground short circuit fault, AB line to line fault earth fault, AB phase fault, BC line to line fault earth fault, BC phase fault, AC line to line fault earth fault, AC phase fault and ABC threephase shortcircuit earth fault any, its analyzing and processing process is as follows;
Step 301, current waveform figure are drawn;
described main control computer (9) calls current waveform drafting module and draws out mains side A phase current signal i _{a}with mains side A phase current waveform figure, mains side B phase current signal i that sampling time t changes _{b}the mains side B phase current waveform figure changed with sampling time t and mains side C phase current signal i _{c}with the mains side C phase current waveform figure that sampling time t changes;
Step 302, fractal box calculate, and detailed process is;
Under step 3021, nonfaulting state, the box counting dimension of electric current calculates;
any one waveform when supposing nonfaulting state in mains side A phase current waveform, mains side B phase current waveform and mains side C phase current waveform is the nonNULL bounded set of points S of Euclidean space _{r}, cover this point set S with the lattice that the length of side is n _{r}time, suppose N _{n}(S _{r}) for wherein comprising point set S when the length of side is n _{r}the minimum box number of point, described main control computer (9) is first according to formula calculate the box counting dimension eigenwert Dim (S of electric current under nonfaulting state _{r}), then according to formula calculate the box counting dimension feature expectation value E (Dim of electric current under nonfaulting state ^{*});
Wherein, r=1,2 ..., m, m be not less than 3 positive integer;
Under step 3022, malfunction, the box counting dimension of electric current calculates;
first, suppose that mains side A phase current waveform is the nonNULL bounded set of points S of Euclidean space _{a}, cover this point set S with the lattice that the length of side is n _{a}time, suppose N _{n}(S _{a}) for wherein comprising point set S when the length of side is n _{a}the minimum box number of point, described main control computer (9) is first according to formula calculate the box counting dimension eigenwert Dim (S of mains side A phase current under malfunction _{a}), then according to formula calculate A phase fractal dimension F _{a};
Then, suppose that mains side B phase current waveform is the nonNULL bounded set of points S of Euclidean space _{b}, cover this point set S with the lattice that the length of side is n _{b}time, suppose N _{n}(S _{b}) for wherein comprising point set S when the length of side is n _{b}the minimum box number of point, described main control computer (9) is first according to formula calculate the box counting dimension eigenwert Dim (S of mains side B phase current under malfunction _{b}), then according to formula calculate B phase fractal dimension F _{b};
Then, suppose that mains side C phase current waveform is the nonNULL bounded set of points S of Euclidean space _{c}, cover this point set S with the lattice that the length of side is n _{c}time, suppose N _{n}(S _{c}) for wherein comprising point set S when the length of side is n _{c}the minimum box number of point, described main control computer (9) is first according to formula calculate the box counting dimension eigenwert Dim (S of mains side C phase current under malfunction _{c}), then according to formula calculate C phase fractal dimension F _{c};
Step 303, current signal spatial alternation;
described main control computer (9) calls current signal triumphant human relations boolean conversion module by mains side A phase current signal i _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}transform to modular space from phase space, obtain 0 mould current component i of mains side current signal _{0}, mains side current signal α
mould current component i _{α}with the β
mould current component i of mains side current signal _{β};
Step 304, wavelet transform is carried out to the current signal of modular space and wavelet coefficient solves;
first, described main control computer (9) chooses 0 mould current component i of mains side current signal _{0}as onedimensional signal f (n _{0}) and call wavelet transform module to onedimensional signal f (n _{0}) carry out wavelet transform, correspondingly try to achieve each layer wavelet coefficient after wavelet transform, the described wavelet coefficient of each layer comprises each layer approximation coefficient and each layer detail coefficients, and each layer detail coefficients is denoted as d _{j,k}, wherein, n _{0}=0,1,2 ... N1 and N is onedimensional signal f (n _{0}) sample sequence in sampled point quantity, onedimensional signal f (n _{0}) sample sequence in the mains side A phase current signal i that all stores with main control computer in step 2 (9) of sampled point quantity, all sample sequences point and the sampling instant corresponding to each sample sequence point _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}sampled point quantity, all sampled points and the sampling instant one_to_one corresponding corresponding to each sampled point;
J=1,2 ..., J and J is the number of plies of wavelet transform, k=0,1,2 ..., N1 and k is onedimensional signal f (n _{0}) sample sequence in the sequence number of N number of sample sequence point;
Then, described main control computer (9) chooses the α
mould current component i of mains side current signal _{α}as onedimensional signal f (n _{α}) and call wavelet transform module to onedimensional signal f (n _{α}) carry out wavelet transform, correspondingly try to achieve each layer wavelet coefficient after wavelet transform, the described wavelet coefficient of each layer comprises each layer approximation coefficient and each layer detail coefficients, and each layer detail coefficients is denoted as d '"'"' _{j,k}, wherein, n _{α}=0,1,2 ... N1 and N is onedimensional signal f (n _{α}) sample sequence in sampled point quantity, onedimensional signal f (n _{α}) sample sequence in the mains side A phase current signal i that all stores with main control computer in step 2 (9) of sampled point quantity, all sample sequences point and the sampling instant corresponding to each sample sequence point _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}sampled point quantity, all sampled points and the sampling instant one_to_one corresponding corresponding to each sampled point;
J=1,2 ..., J and J is the number of plies of wavelet transform, k=0,1,2 ..., N1 and k is onedimensional signal f (n _{α}) sample sequence in the sequence number of N number of sample sequence point;
Then, described main control computer (9) chooses the β
mould current component i of mains side current signal _{β}as onedimensional signal f (n _{β}) and call wavelet transform module to onedimensional signal f (n _{β}) carry out wavelet transform, correspondingly try to achieve each layer wavelet coefficient after wavelet transform, the described wavelet coefficient of each layer comprises each layer approximation coefficient and each layer detail coefficients, and each layer detail coefficients is denoted as d " _{j,k}, wherein, n _{β}=0,1,2 ... N1 and N is onedimensional signal f (n _{β}) sample sequence in sampled point quantity, onedimensional signal f (n _{β}) sample sequence in the mains side A phase current signal i that all stores with main control computer in step 2 (9) of sampled point quantity, all sample sequences point and the sampling instant corresponding to each sample sequence point _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}sampled point quantity, all sampled points and the sampling instant one_to_one corresponding corresponding to each sampled point;
J=1,2 ..., J and J is the number of plies of wavelet transform, k=0,1,2 ..., N1 and k is onedimensional signal f (n _{β}) sample sequence in the sequence number of N number of sample sequence point;
The initial row mode maximum point of step 305, current signal detects;
first, described main control computer (9) is according to onedimensional signal f (n _{0}) the sampling order of sample sequence, from front to back to J layer detail coefficients d _{j,k}modulus maximum point carry out detecting and record, and detect draw as k=i, d _{j,k}obtain modulus maximum point, i.e. 0 mould current component i of mains side current signal _{0}initial row mode maximum value I _{0}=d _{j,i};
Then, described main control computer (9) is according to onedimensional signal f (n _{α}) the sampling order of sample sequence, from front to back to J layer detail coefficients d '"'"' _{j,k}modulus maximum point carry out detecting and record, and detect draw as k=i, d '"'"' _{j,k}obtain modulus maximum point, i.e. the α
mould current component i of mains side current signal _{α}initial row mode maximum value I _{α}=d '"'"' _{j,i};
Then, described main control computer (9) is according to onedimensional signal f (n _{β}) the sampling order of sample sequence, from front to back to J layer detail coefficients d " _{j,k}modulus maximum point carry out detecting and record, and detect draw as k=i, d " _{j,k}obtain modulus maximum point, i.e. the β
mould current component i of mains side current signal _{β}initial row mode maximum value I _{β}=d " _{j,i};
Wherein, i=0,1,2 ..., N1;
Step 306, cable fault identification;
described main control computer (9) is to A phase fractal dimension F _{a}, B phase fractal dimension F _{b}with C phase fractal dimension F _{c}compare, and the 0 mould current component i to mains side current signal _{0}initial row mode maximum value I _{0}, mains side current signal α
mould current component i _{α}initial row mode maximum value I _{α}with the β
mould current component i of mains side current signal _{β}initial row mode maximum value I _{β}compare, and according to comparison result, cable fault identified, be specially;
Work as F _{c}>
F _{a}>
F _{b}time, be judged to be ABC threephase shortcircuit earth fault, end of identification also exports recognition result;
Work as F _{b}>
F _{a}>
F _{c}time, first judge whether I _{α}≠
0, work as I _{α}when ≠
0, judge whether I _{β}≠
0, work as I _{α}≠
0 and I _{β}when ≠
0, be judged to be A phase ground short circuit fault;
Work as I _{α}≠
0 and I _{β}when=0, be judged to be B phase ground short circuit fault;
Work as I _{α}when=0, be judged to be C phase ground short circuit fault;
End of identification also exports recognition result;
Work as F _{c}>
F _{b}>
F _{a}time, first judge whether I _{0}=0, work as I _{0}when=0, be judged to be AB phase fault;
Work as I _{0}when ≠
0, be judged to be AB line to line fault earth fault;
End of identification also exports recognition result;
Work as F _{b}>
F _{c}>
F _{a}time, first judge whether I _{0}=0, work as I _{0}when=0, be judged to be AC phase fault;
Work as I _{0}when ≠
0, be judged to be AC line to line fault earth fault;
End of identification also exports recognition result;
Work as F _{a}>
F _{b}>
F _{c}time, first judge whether I _{0}=0, work as I _{0}when=0, be judged to be BC phase fault;
Work as I _{0}when ≠
0, be judged to be BC line to line fault earth fault;
End of identification also exports recognition result;
Step 4, cable fault are located;
when detected cable (11) breaks down, the mains side A phase voltage signal U that the second data collecting card (8) sends _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}, and loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' be faultsignal, now pass through main control computer (9) to mains side A phase voltage signal U _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}, and loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' carry out analyzing and processing, and the corresponding abort situation drawing detected cable (11), its analyzing and processing process is as follows;
Step 401, voltage oscillogram are drawn;
first, described main control computer (9) calls voltage waveform drafting module and draws out mains side A phase voltage signal U _{a}with mains side A phase voltage waveform figure, mains side B phase voltage signal U that sampling time t changes _{b}the mains side B phase voltage waveform figure changed with sampling time t and mains side C phase voltage signal U _{c}with the mains side C phase voltage waveform figure that sampling time t changes, and loadside A phase voltage signal U _{a}'"'"' with sampling time t change loadside A phase voltage waveform figure, loadside B phase voltage signal U _{b}'"'"' with sampling time t change loadside B phase voltage waveform figure and loadside C phase voltage signal U _{c}'"'"' with sampling time t change loadside C phase voltage waveform figure;
Step 402, voltage signal spatial alternation;
described main control computer (9) calls voltage signal triumphant human relations boolean conversion module by mains side A phase voltage signal U _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}transform to modular space from phase space, obtain 0 mode voltage component u of mains side voltage signal _{0}, mains side voltage signal α
mode voltage component u _{α}with the β
mode voltage component u of mains side voltage signal _{β};
And by loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' transform to modular space from phase space, obtain 0 mode voltage component u '"'"' of load side voltage signal _{0}, load side voltage signal α
mode voltage component u _{α}'"'"' and the β
mode voltage component u of load side voltage signal _{β}'"'"';
Step 403, β
mode voltage component u to mains side voltage signal _{β}with the β
mode voltage component u of load side voltage signal _{β}'"'"' carry out wavelet transform and wavelet coefficient solves;
first, described main control computer (9) chooses the β
mode voltage component u of mains side voltage signal _{β}as onedimensional signal f (m _{β}) and call wavelet transform module to onedimensional signal f (m _{β}) carry out wavelet transform, correspondingly try to achieve each layer wavelet coefficient after wavelet transform, each layer wavelet coefficient comprises each layer approximation coefficient and each layer detail coefficients, and each layer detail coefficients is denoted as d _{j '"'"', k '"'"'}, wherein, m _{β}=0,1,2 ... M1 and M is onedimensional signal f (m _{β}) sample sequence in sampled point quantity, onedimensional signal f (m _{β}) sample sequence in the mains side A phase voltage signal U that all stores with main control computer in step 2 (9) of sampled point quantity, all sample sequences point and the sampling instant corresponding to each sample sequence point _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}sampled point quantity, all sampled points and the sampling instant one_to_one corresponding corresponding to each sampled point;
J '"'"'=1,2 ..., the number of plies that J '"'"' and J '"'"' are wavelet transform, k '"'"'=0,1,2 ..., M1 and k '"'"' is onedimensional signal f (m _{β}) sample sequence in the sequence number of M sample sequence point;
Then, described main control computer (9) chooses the β
mode voltage component u '"'"' of load side voltage signal _{β}as onedimensional signal f (m '"'"' _{β}) and call wavelet transform module to onedimensional signal f (m '"'"' _{β}) carry out wavelet transform, correspondingly try to achieve each layer wavelet coefficient after wavelet transform, each layer wavelet coefficient comprises each layer approximation coefficient and each layer detail coefficients, and each layer detail coefficients is denoted as d '"'"' _{j '"'"', k '"'"'}, wherein, m '"'"' _{β}=0,1,2 ... M1 and M be onedimensional signal f (m '"'"' _{β}) sample sequence in sampled point quantity, onedimensional signal f (m '"'"' _{β}) sample sequence in the mains side A phase voltage signal U that all stores with main control computer in step 2 (9) of sampled point quantity, all sample sequences point and the sampling instant corresponding to each sample sequence point _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}sampled point quantity, all sampled points and the sampling instant one_to_one corresponding corresponding to each sampled point;
J '"'"'=1,2 ..., the number of plies that J '"'"' and J '"'"' are wavelet transform, k '"'"'=0,1,2 ..., M1 and k '"'"' is onedimensional signal f (m _{β}) sample sequence in the sequence number of M sample sequence point;
The initial row mode maximum point of step 404, voltage signal detects;
first, described main control computer (9) is according to onedimensional signal f (m _{β}) the sampling order of sample sequence, from front to back to the J '"'"' layer detail coefficients d _{j '"'"', k '"'"'}modulus maximum point carry out detecting and record, and detect draw when k '"'"'=i '"'"' time, d _{j '"'"', k '"'"'}obtain modulus maximum point, i.e. the β
mode voltage component u of mains side voltage signal _{β}initial row mode maximum value U _{β}=d _{j '"'"', i '"'"'}, the β
mode voltage component u of recording power side voltage signal _{β}initial row mode maximum value U _{β}the moment t occurred _{1};
Then, described main control computer (9) according to onedimensional signal f (m '"'"' _{β}) the sampling order of sample sequence, from front to back to the J '"'"' layer detail coefficients d '"'"' _{j '"'"', k '"'"'}modulus maximum point carry out detecting and record, and detect draw when k '"'"'=i '"'"' time, d '"'"' _{j '"'"', k '"'"'}obtain modulus maximum point, i.e. the β
mode voltage component u '"'"' of load side voltage signal _{β}initial row mode maximum value U '"'"' _{β}=d '"'"' _{j '"'"', i '"'"'}, the β
mode voltage component u '"'"' of record load side voltage signal _{β}initial row mode maximum value U '"'"' _{β}the moment t occurred _{2};
Wherein, i '"'"'=0,1,2 ..., M1;
Step 405, cable fault are located;
described main control computer (9) is according to formula calculate the distance x of cable fault position to the installation site of mains side A phase Hall current sensor (1), mains side B phase Hall current sensor (2) and mains side C phase Hall current sensor (3), wherein, l is the total length of detected cable (11), v be transient state travelling wave in the upper speed propagated of detected cable (11) and l is the inductance of detected cable (11) unit length, and C is the electric capacity of detected cable (11) unit length.
Chinese PRB Reexamination
Abstract
The invention discloses a cable line fault recognition and localization method based on a transient traveling wave mode maximum method. The method includes steps that firstly, signal realtime detection and synchronous uploading are carried out; secondly, signal acquisition and storage are carried out; thirdly, cable fault recognition is carried out, wherein a current oscillogram is drawn, the fractal box dimension is calculated, spatial transformation is carried out on a current signal, discrete wavelet transformation and wavelet coefficient solution are carried out on the current signal in a mode space, initial traveling wave mode maximum point detection is carried out on the current signal, and cable fault recognition is carried out; fourthly, cable fault localization is carried out, wherein a voltage oscillogram is drawn, spatial transformation is carried out on a voltage signal, discrete wavelet transformation and wavelet coefficient solution are carried out on the beta mode voltage component ubeta of a powerside voltage signal and the beta mode voltage component ubeta'"'"' of a loadside voltage signal, initial traveling wave mode maximum point detection is carried out on the voltage signals, and cable fault localization is carried out. The method is convenient to implement due to the simple steps, high in fault recognition and localization efficiency and accuracy, complete in function and high in practicability.

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8 Claims

1. , based on cable line fault identification and the localization method of transient state travelling wave modulus maximum, it is characterized in that the method comprises the following steps:

Step one, signal detect and synchronized upload in real time;
detected in real time by the A phase current of mains side A phase Hall current sensor (1) to detected cable (11) place line electricity source, and by realtime detected mains side A phase current signal i _{a}synchronized upload to the first data collecting card (7), meanwhile, by realtime detected mains side A phase current signal i _{a}carry out I/V by I/V changeover circuit module (10) and be converted to mains side A phase voltage signal U _{a}rear synchronized upload to the second data collecting card (8);
Detected in real time by the B phase current of mains side B phase Hall current sensor (2) to detected cable (11) place line electricity source, and by realtime detected mains side B phase current signal i _{b}synchronized upload to the first data collecting card (7), meanwhile, by realtime detected mains side B phase current signal i _{b}carry out I/V by I/V changeover circuit module (10) and be converted to mains side B phase voltage signal U _{b}rear synchronized upload to the second data collecting card (8);
Detected in real time by the C phase current of mains side C phase Hall current sensor (3) to detected cable (11) place line electricity source, and by realtime detected mains side C phase current signal i _{c}synchronized upload to the first data collecting card (7), meanwhile, by realtime detected mains side C phase current signal i _{c}carry out I/V by I/V changeover circuit module (10) and be converted to mains side C phase voltage signal U _{c}rear synchronized upload to the second data collecting card (8);
Detected in real time by the A phase current of loadside A phase Hall current sensor (4) to line load side, detected cable (11) place, and by realtime detected loadside A phase current signal i _{a}'"'"' carry out I/V by I/V changeover circuit module (10) to be converted to loadside A phase voltage signal U _{a}'"'"' rear synchronized upload to the second data collecting card (8);
Detected in real time by the B phase current of loadside B phase Hall current sensor (5) to line load side, detected cable (11) place, and by realtime detected loadside B phase current signal i _{b}'"'"' carry out I/V by I/V changeover circuit module (10) to be converted to loadside B phase voltage signal U _{b}'"'"' rear synchronized upload to the second data collecting card (8);
Detected in real time by the C phase current of loadside C phase Hall current sensor (6) to line load side, detected cable (11) place, and by realtime detected loadside C phase current signal i _{c}'"'"' carry out I/V by I/V changeover circuit module (10) to be converted to loadside C phase voltage signal U _{c}'"'"' rear synchronized upload to the second data collecting card (8);
Step 2, signals collecting and storage;
the first data collecting card (7) is to mains side A phase current signal i _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}carry out gathering and corresponding carry out A/D conversion after, synchronous driving is to main control computer (9);
Second data collecting card (8) is to mains side A phase voltage signal U _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}, and loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' carry out gathering and corresponding carry out A/D conversion after, synchronous driving is to main control computer (9);
Main control computer (9) is to mains side A phase current signal i _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}, mains side A phase voltage signal U _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}, and loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' sampled point quantity, all sampled points and the sampling instant corresponding to each sampled point store;
Step 3, cable fault identification;
when detected cable (11) breaks down, the mains side A phase current signal i that the first data collecting card (7) sends _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}for faultsignal, now pass through main control computer (9) to mains side A phase current signal i _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}carry out analyzing and processing, and corresponding to show that the fault type of detected cable (11) belongs in A phase ground short circuit fault, B phase ground short circuit fault, C phase ground short circuit fault, AB line to line fault earth fault, AB phase fault, BC line to line fault earth fault, BC phase fault, AC line to line fault earth fault, AC phase fault and ABC threephase shortcircuit earth fault any, its analyzing and processing process is as follows;
Step 301, current waveform figure are drawn;
described main control computer (9) calls current waveform drafting module and draws out mains side A phase current signal i _{a}with mains side A phase current waveform figure, mains side B phase current signal i that sampling time t changes _{b}the mains side B phase current waveform figure changed with sampling time t and mains side C phase current signal i _{c}with the mains side C phase current waveform figure that sampling time t changes;
Step 302, fractal box calculate, and detailed process is; Under step 3021, nonfaulting state, the box counting dimension of electric current calculates;
any one waveform when supposing nonfaulting state in mains side A phase current waveform, mains side B phase current waveform and mains side C phase current waveform is the nonNULL bounded set of points S of Euclidean space _{r}, cover this point set S with the lattice that the length of side is n _{r}time, suppose N _{n}(S _{r}) for wherein comprising point set S when the length of side is n _{r}the minimum box number of point, described main control computer (9) is first according to formula calculate the box counting dimension eigenwert Dim (S of electric current under nonfaulting state _{r}), then according to formula calculate the box counting dimension feature expectation value E (Dim of electric current under nonfaulting state ^{*});
Wherein, r=1,2 ..., m, m be not less than 3 positive integer;
Under step 3022, malfunction, the box counting dimension of electric current calculates;
first, suppose that mains side A phase current waveform is the nonNULL bounded set of points S of Euclidean space _{a}, cover this point set S with the lattice that the length of side is n _{a}time, suppose N _{n}(S _{a}) for wherein comprising point set S when the length of side is n _{a}the minimum box number of point, described main control computer (9) is first according to formula calculate the box counting dimension eigenwert Dim (S of mains side A phase current under malfunction _{a}), then according to formula calculate A phase fractal dimension F _{a};
Then, suppose that mains side B phase current waveform is the nonNULL bounded set of points S of Euclidean space _{b}, cover this point set S with the lattice that the length of side is n _{b}time, suppose N _{n}(S _{b}) for wherein comprising point set S when the length of side is n _{b}the minimum box number of point, described main control computer (9) is first according to formula calculate the box counting dimension eigenwert Dim (S of mains side B phase current under malfunction _{b}), then according to formula calculate B phase fractal dimension F _{b};
Then, suppose that mains side C phase current waveform is the nonNULL bounded set of points S of Euclidean space _{c}, cover this point set S with the lattice that the length of side is n _{c}time, suppose N _{n}(S _{c}) for wherein comprising point set S when the length of side is n _{c}the minimum box number of point, described main control computer (9) is first according to formula calculate the box counting dimension eigenwert Dim (S of mains side C phase current under malfunction _{c}), then according to formula calculate C phase fractal dimension F _{c};
Step 303, current signal spatial alternation;
described main control computer (9) calls current signal triumphant human relations boolean conversion module by mains side A phase current signal i _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}transform to modular space from phase space, obtain 0 mould current component i of mains side current signal _{0}, mains side current signal α
mould current component i _{α}with the β
mould current component i of mains side current signal _{β};
Step 304, wavelet transform is carried out to the current signal of modular space and wavelet coefficient solves;
first, described main control computer (9) chooses 0 mould current component i of mains side current signal _{0}as onedimensional signal f (n _{0}) and call wavelet transform module to onedimensional signal f (n _{0}) carry out wavelet transform, correspondingly try to achieve each layer wavelet coefficient after wavelet transform, the described wavelet coefficient of each layer comprises each layer approximation coefficient and each layer detail coefficients, and each layer detail coefficients is denoted as d _{j,k}, wherein, n _{0}=0,1,2 ... N1 and N is onedimensional signal f (n _{0}) sample sequence in sampled point quantity, onedimensional signal f (n _{0}) sample sequence in the mains side A phase current signal i that all stores with main control computer in step 2 (9) of sampled point quantity, all sample sequences point and the sampling instant corresponding to each sample sequence point _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}sampled point quantity, all sampled points and the sampling instant one_to_one corresponding corresponding to each sampled point;
J=1,2 ..., J and J is the number of plies of wavelet transform, k=0,1,2 ..., N1 and k is onedimensional signal f (n _{0}) sample sequence in the sequence number of N number of sample sequence point;
Then, described main control computer (9) chooses the α
mould current component i of mains side current signal _{α}as onedimensional signal f (n _{α}) and call wavelet transform module to onedimensional signal f (n _{α}) carry out wavelet transform, correspondingly try to achieve each layer wavelet coefficient after wavelet transform, the described wavelet coefficient of each layer comprises each layer approximation coefficient and each layer detail coefficients, and each layer detail coefficients is denoted as d '"'"' _{j,k}, wherein, n _{α}=0,1,2 ... N1 and N is onedimensional signal f (n _{α}) sample sequence in sampled point quantity, onedimensional signal f (n _{α}) sample sequence in the mains side A phase current signal i that all stores with main control computer in step 2 (9) of sampled point quantity, all sample sequences point and the sampling instant corresponding to each sample sequence point _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}sampled point quantity, all sampled points and the sampling instant one_to_one corresponding corresponding to each sampled point;
J=1,2 ..., J and J is the number of plies of wavelet transform, k=0,1,2 ..., N1 and k is onedimensional signal f (n _{α}) sample sequence in the sequence number of N number of sample sequence point;
Then, described main control computer (9) chooses the β
mould current component i of mains side current signal _{β}as onedimensional signal f (n _{β}) and call wavelet transform module to onedimensional signal f (n _{β}) carry out wavelet transform, correspondingly try to achieve each layer wavelet coefficient after wavelet transform, the described wavelet coefficient of each layer comprises each layer approximation coefficient and each layer detail coefficients, and each layer detail coefficients is denoted as d " _{j,k}, wherein, n _{β}=0,1,2 ... N1 and N is onedimensional signal f (n _{β}) sample sequence in sampled point quantity, onedimensional signal f (n _{β}) sample sequence in the mains side A phase current signal i that all stores with main control computer in step 2 (9) of sampled point quantity, all sample sequences point and the sampling instant corresponding to each sample sequence point _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}sampled point quantity, all sampled points and the sampling instant one_to_one corresponding corresponding to each sampled point;
J=1,2 ..., J and J is the number of plies of wavelet transform, k=0,1,2 ..., N1 and k is onedimensional signal f (n _{β}) sample sequence in the sequence number of N number of sample sequence point;
The initial row mode maximum point of step 305, current signal detects;
first, described main control computer (9) is according to onedimensional signal f (n _{0}) the sampling order of sample sequence, from front to back to J layer detail coefficients d _{j,k}modulus maximum point carry out detecting and record, and detect draw as k=i, d _{j,k}obtain modulus maximum point, i.e. 0 mould current component i of mains side current signal _{0}initial row mode maximum value I _{0}=d _{j,i};
Then, described main control computer (9) is according to onedimensional signal f (n _{α}) the sampling order of sample sequence, from front to back to J layer detail coefficients d '"'"' _{j,k}modulus maximum point carry out detecting and record, and detect draw as k=i, d '"'"' _{j,k}obtain modulus maximum point, i.e. the α
mould current component i of mains side current signal _{α}initial row mode maximum value I _{α}=d '"'"' _{j,i};
Then, described main control computer (9) is according to onedimensional signal f (n _{β}) the sampling order of sample sequence, from front to back to J layer detail coefficients d " _{j,k}modulus maximum point carry out detecting and record, and detect draw as k=i, d " _{j,k}obtain modulus maximum point, i.e. the β
mould current component i of mains side current signal _{β}initial row mode maximum value I _{β}=d " _{j,i};
Wherein, i=0,1,2 ..., N1;
Step 306, cable fault identification;
described main control computer (9) is to A phase fractal dimension F _{a}, B phase fractal dimension F _{b}with C phase fractal dimension F _{c}compare, and the 0 mould current component i to mains side current signal _{0}initial row mode maximum value I _{0}, mains side current signal α
mould current component i _{α}initial row mode maximum value I _{α}with the β
mould current component i of mains side current signal _{β}initial row mode maximum value I _{β}compare, and according to comparison result, cable fault identified, be specially;
Work as F _{c}>
F _{a}>
F _{b}time, be judged to be ABC threephase shortcircuit earth fault, end of identification also exports recognition result;
Work as F _{b}>
F _{a}>
F _{c}time, first judge whether I _{α}≠
0, work as I _{α}when ≠
0, judge whether I _{β}≠
0, work as I _{α}≠
0 and I _{β}when ≠
0, be judged to be A phase ground short circuit fault;
Work as I _{α}≠
0 and I _{β}when=0, be judged to be B phase ground short circuit fault;
Work as I _{α}when=0, be judged to be C phase ground short circuit fault;
End of identification also exports recognition result;
Work as F _{c}>
F _{b}>
F _{a}time, first judge whether I _{0}=0, work as I _{0}when=0, be judged to be AB phase fault;
Work as I _{0}when ≠
0, be judged to be AB line to line fault earth fault;
End of identification also exports recognition result;
Work as F _{b}>
F _{c}>
F _{a}time, first judge whether I _{0}=0, work as I _{0}when=0, be judged to be AC phase fault;
Work as I _{0}when ≠
0, be judged to be AC line to line fault earth fault;
End of identification also exports recognition result;
Work as F _{a}>
F _{b}>
F _{c}time, first judge whether I _{0}=0, work as I _{0}when=0, be judged to be BC phase fault;
Work as I _{0}when ≠
0, be judged to be BC line to line fault earth fault;
End of identification also exports recognition result;
Step 4, cable fault are located;
when detected cable (11) breaks down, the mains side A phase voltage signal U that the second data collecting card (8) sends _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}, and loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' be faultsignal, now pass through main control computer (9) to mains side A phase voltage signal U _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}, and loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' carry out analyzing and processing, and the corresponding abort situation drawing detected cable (11), its analyzing and processing process is as follows;
Step 401, voltage oscillogram are drawn;
first, described main control computer (9) calls voltage waveform drafting module and draws out mains side A phase voltage signal U _{a}with mains side A phase voltage waveform figure, mains side B phase voltage signal U that sampling time t changes _{b}the mains side B phase voltage waveform figure changed with sampling time t and mains side C phase voltage signal U _{c}with the mains side C phase voltage waveform figure that sampling time t changes, and loadside A phase voltage signal U _{a}'"'"' with sampling time t change loadside A phase voltage waveform figure, loadside B phase voltage signal U _{b}'"'"' with sampling time t change loadside B phase voltage waveform figure and loadside C phase voltage signal U _{c}'"'"' with sampling time t change loadside C phase voltage waveform figure;
Step 402, voltage signal spatial alternation;
described main control computer (9) calls voltage signal triumphant human relations boolean conversion module by mains side A phase voltage signal U _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}transform to modular space from phase space, obtain 0 mode voltage component u of mains side voltage signal _{0}, mains side voltage signal α
mode voltage component u _{α}with the β
mode voltage component u of mains side voltage signal _{β};
And by loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' transform to modular space from phase space, obtain 0 mode voltage component u '"'"' of load side voltage signal _{0}, load side voltage signal α
mode voltage component u _{α}'"'"' and the β
mode voltage component u of load side voltage signal _{β}'"'"';
Step 403, β
mode voltage component u to mains side voltage signal _{β}with the β
mode voltage component u of load side voltage signal _{β}'"'"' carry out wavelet transform and wavelet coefficient solves;
first, described main control computer (9) chooses the β
mode voltage component u of mains side voltage signal _{β}as onedimensional signal f (m _{β}) and call wavelet transform module to onedimensional signal f (m _{β}) carry out wavelet transform, correspondingly try to achieve each layer wavelet coefficient after wavelet transform, each layer wavelet coefficient comprises each layer approximation coefficient and each layer detail coefficients, and each layer detail coefficients is denoted as d _{j '"'"', k '"'"'}, wherein, m _{β}=0,1,2 ... M1 and M is onedimensional signal f (m _{β}) sample sequence in sampled point quantity, onedimensional signal f (m _{β}) sample sequence in the mains side A phase voltage signal U that all stores with main control computer in step 2 (9) of sampled point quantity, all sample sequences point and the sampling instant corresponding to each sample sequence point _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}sampled point quantity, all sampled points and the sampling instant one_to_one corresponding corresponding to each sampled point;
J '"'"'=1,2 ..., the number of plies that J '"'"' and J '"'"' are wavelet transform, k '"'"'=0,1,2 ..., M1 and k '"'"' is onedimensional signal f (m _{β}) sample sequence in the sequence number of M sample sequence point;
Then, described main control computer (9) chooses the β
mode voltage component u '"'"' of load side voltage signal _{β}as onedimensional signal f (m '"'"' _{β}) and call wavelet transform module to onedimensional signal f (m '"'"' _{β}) carry out wavelet transform, correspondingly try to achieve each layer wavelet coefficient after wavelet transform, each layer wavelet coefficient comprises each layer approximation coefficient and each layer detail coefficients, and each layer detail coefficients is denoted as d '"'"' _{j '"'"', k '"'"'}, wherein, m '"'"' _{β}=0,1,2 ... M1 and M be onedimensional signal f (m '"'"' _{β}) sample sequence in sampled point quantity, onedimensional signal f (m '"'"' _{β}) sample sequence in the mains side A phase voltage signal U that all stores with main control computer in step 2 (9) of sampled point quantity, all sample sequences point and the sampling instant corresponding to each sample sequence point _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}sampled point quantity, all sampled points and the sampling instant one_to_one corresponding corresponding to each sampled point;
J '"'"'=1,2 ..., the number of plies that J '"'"' and J '"'"' are wavelet transform, k '"'"'=0,1,2 ..., M1 and k '"'"' is onedimensional signal f (m _{β}) sample sequence in the sequence number of M sample sequence point;
The initial row mode maximum point of step 404, voltage signal detects;
first, described main control computer (9) is according to onedimensional signal f (m _{β}) the sampling order of sample sequence, from front to back to the J '"'"' layer detail coefficients d _{j '"'"', k '"'"'}modulus maximum point carry out detecting and record, and detect draw when k '"'"'=i '"'"' time, d _{j '"'"', k '"'"'}obtain modulus maximum point, i.e. the β
mode voltage component u of mains side voltage signal _{β}initial row mode maximum value U _{β}=d _{j '"'"', i '"'"'}, the β
mode voltage component u of recording power side voltage signal _{β}initial row mode maximum value U _{β}the moment t occurred _{1};
Then, described main control computer (9) according to onedimensional signal f (m '"'"' _{β}) the sampling order of sample sequence, from front to back to the J '"'"' layer detail coefficients d '"'"' _{j '"'"', k '"'"'}modulus maximum point carry out detecting and record, and detect draw when k '"'"'=i '"'"' time, d '"'"' _{j '"'"', k '"'"'}obtain modulus maximum point, i.e. the β
mode voltage component u '"'"' of load side voltage signal _{β}initial row mode maximum value U '"'"' _{β}=d '"'"' _{j '"'"', i '"'"'}, the β
mode voltage component u '"'"' of record load side voltage signal _{β}initial row mode maximum value U '"'"' _{β}the moment t occurred _{2};
Wherein, i '"'"'=0,1,2 ..., M1;
Step 405, cable fault are located;
described main control computer (9) is according to formula calculate the distance x of cable fault position to the installation site of mains side A phase Hall current sensor (1), mains side B phase Hall current sensor (2) and mains side C phase Hall current sensor (3), wherein, l is the total length of detected cable (11), v be transient state travelling wave in the upper speed propagated of detected cable (11) and l is the inductance of detected cable (11) unit length, and C is the electric capacity of detected cable (11) unit length.


2. according to the cable line fault identification based on transient state travelling wave modulus maximum according to claim 1 and localization method, it is characterized in that:
 described first data collecting card (7) is data collecting card PCI9203, described second data collecting card (8) is data collecting card PCI6221.

3.
3., according to the cable line fault identification based on transient state travelling wave modulus maximum according to claim 1 and localization method, it is characterized in that:  the value of n described in step 3021 and step 3022 be less than 1 positive number.

4. according to the cable line fault identification based on transient state travelling wave modulus maximum according to claim 1 and localization method, it is characterized in that:
 main control computer described in step 303 (9) calls current signal triumphant human relations boolean conversion module by mains side A phase current signal i _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}transform to modular space from phase space, the transformation matrix of employing is 0 mould current component of the mains side current signal obtained the α
mould current component of the mains side current signal obtained the β
mould current component of the mains side current signal obtained
 main control computer described in step 303 (9) calls current signal triumphant human relations boolean conversion module by mains side A phase current signal i _{a}, mains side B phase current signal i _{b}with mains side C phase current signal i _{c}transform to modular space from phase space, the transformation matrix of employing is 0 mould current component of the mains side current signal obtained the α

5. according to the cable line fault identification based on transient state travelling wave modulus maximum according to claim 1 and localization method, it is characterized in that:
 the value of J described in step 304 is 3 ~ 7.

6. according to the cable line fault identification based on transient state travelling wave modulus maximum according to claim 1 and localization method, it is characterized in that:
 main control computer described in step 402 (9) calls voltage signal triumphant human relations boolean conversion module by mains side A phase voltage signal U _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}transform to modular space from phase space, the transformation matrix of employing is 0 mode voltage component of the mains side voltage signal obtained the α
mould current component of the mains side current signal obtained the β
mould current component of the mains side current signal obtained
 main control computer described in step 402 (9) calls voltage signal triumphant human relations boolean conversion module by mains side A phase voltage signal U _{a}, mains side B phase voltage signal U _{b}with mains side C phase voltage signal U _{c}transform to modular space from phase space, the transformation matrix of employing is 0 mode voltage component of the mains side voltage signal obtained the α

7. according to the cable line fault identification based on transient state travelling wave modulus maximum according to claim 1 and localization method, it is characterized in that:
 main control computer described in step 402 (9) calls voltage signal triumphant human relations boolean conversion module by loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' transforming to modular space from phase space, the transformation matrix of employing is 0 mode voltage component of the load side voltage signal obtained the α
mode voltage component of the load side voltage signal obtained the β
mode voltage component of the load side voltage signal obtained
 main control computer described in step 402 (9) calls voltage signal triumphant human relations boolean conversion module by loadside A phase voltage signal U _{a}'"'"', loadside B phase voltage signal U _{b}'"'"' and loadside C phase voltage signal U _{c}'"'"' transforming to modular space from phase space, the transformation matrix of employing is 0 mode voltage component of the load side voltage signal obtained the α

8. according to the cable line fault identification based on transient state travelling wave modulus maximum according to claim 1 and localization method, it is characterized in that:
 the value of J '"'"' described in step 403 is 3 ~ 7.
Specification(s)