Enable huge pages to use fewer pages to cover the physical address space.
The CPU-Cache translation lookaside buffer (TLB) stores information about conversions from an virtual page address to the physical page address, and every byte access to physical memory requires a conversion (called a “cache miss”). Although these cache misses are very expensive, you can improve the TLB hits by enabling “huge pages.”
Once enabled, huge pages use fewer pages to cover the physical address space, so the size of “book keeping” (mapping from the virtual to the physical address ) decreases, requiring fewer entries in the TLB and improving the system performance.
Adaptive Server version 15.0.3 and later allocates shared memory using huge pages by default. However, if the system does not have enough huge pages—or is not configured for huge pages—Adaptive Server uses regular pages.
To enable huge pages, start Adaptive Server with traceflag 1653. Adaptive Server adjusts its shared memory up to the nearest multiple of 256MB.